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Refactor PSRAM clock frequency handling#19224

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phuzzyday wants to merge 3 commits into
micropython:masterfrom
phuzzyday:patch-1
Open

Refactor PSRAM clock frequency handling#19224
phuzzyday wants to merge 3 commits into
micropython:masterfrom
phuzzyday:patch-1

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@phuzzyday
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@phuzzyday phuzzyday commented May 15, 2026

Read clock speed before entering direct mode (flash access is unavailable while QMI direct mode is enabled)

Summary

Fix PSRAM init crash when system clock differs from default
Move clock_get_hz() call before QMI direct mode is enabled.
Flash access is unavailable during direct mode, causing a bus fault
on the instruction fetch when clock_configure_undivided is not
in the XIP cache. Confirmed via debugprobe on WeAct RP2350A.

NOTE - Failed Checks are happening in areas of the code far away from what I changed.

Tested on multiple RP2350 boards. (Weact.)

Generative AI

I used generative AI tools when creating this PR, but a human has checked the
code and is responsible for the code and the description above. (earlphilhower)

Read clock speed before entering direct mode (flash access is
unavailable while QMI direct mode is enabled)

Signed-off-by: phuzzyday <phuzzyd@yahoo.ca>
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github-actions Bot commented May 15, 2026

Code size report:

Reference:  tests: Update ESP32-Cx detection to match standard name. [334c031]
Comparison: Fix formatting of comments in rp2_psram.c [merge of a21b9b0]
  mpy-cross:    +0 +0.000% 
   bare-arm:    +0 +0.000% 
minimal x86:    +0 +0.000% 
   unix x64:    +0 +0.000% standard
      stm32:    +0 +0.000% PYBV10
      esp32:    +0 +0.000% ESP32_GENERIC
     mimxrt:    +0 +0.000% TEENSY40
        rp2:    +0 +0.000% RPI_PICO_W
       samd:    +0 +0.000% ADAFRUIT_ITSYBITSY_M4_EXPRESS
  qemu rv32:    +0 +0.000% VIRT_RV32

phuzzyday added 2 commits May 14, 2026 22:34
Removed blank space

Signed-off-by: phuzzyday <phuzzyd@yahoo.ca>
Signed-off-by: phuzzyday <phuzzyd@yahoo.ca>
@agatti
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agatti commented May 15, 2026

NOTE - Failed Checks are happening in areas of the code far away from what I changed.

If with failed checks you mean the CI errors, then those are related to your changes. Given what you committed I reckon you probably didn't read CODECONVENTIONS.md and maybe didn't set up the environment as described in that document.

Just in case, please read that document. There's all the necessary information to not cause the two CI errors you see here.

Also, since the commits have to be altered, please squash those three commits into just one atomic change. You're just making minor modifications to your main change, after all.

@Gadgetoid
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Support for PSRAM on RP2 should be moved upstream to rely on the Pico SDK functions when possible- #19209

As such it would be prudent to make sure these issues don't also exist in the Pico SDK implementation, or we'll get a regression sometime in the future- raspberrypi/pico-sdk#2919

@will-v-pi
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Support for PSRAM on RP2 should be moved upstream to rely on the Pico SDK functions when possible- #19209

As such it would be prudent to make sure these issues don't also exist in the Pico SDK implementation, or we'll get a regression sometime in the future- raspberrypi/pico-sdk#2919

Upstream support isn't affected by this, as the timing calculation is already separated from the direct mode use

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5 participants